CS411/511. Operating Systems

Homework 3 - Solutions


Chapter 8: Review Questions 8.4, 8.10, 8.11, 8.16

511 students only: 8.17

8.4. When a process is rolled out of memory, it loses its ability to use the CPU (at least for a while). Describe another situation where a process loses its ability to use the CPU, but where the process does not get rolled out.

8.10. Consider a paging system with the page table stored in memory.
(a) If a memory reference takes 200 nanoseconds, how long does a paged memory reference take?

(b) If we add associative registers, and 75% of all page-table references are found in the associative registers, what is the effective memory reference time? (Assume that finding a page-table entry in the associative registers takes zero time, if the entry is there.)
8.11. What is the effect of allowing two entires in a page table to point to the same page frame in memory? Explain how this effect could be used to decrease the amount of time needed to copy a large amount of memory from one place to another. What would the effect of updating some byte in the one page be on the other page? 8.16. Consider the following segment table:
		Segment		Base		Length
		  0		 219		  600
		  1		2300		   14
		  2		  90		  100
		  3		1327		  580
		  4		1952		   96
What are the physical addressed for the following logical addresses?
(a) 0,430
(b) 1,10
(c) 2,500
(d) 3,400
(e) 4,112
8.17. Consider the Intel address translation scheme shown in Figure 8.28
(a) Describe all the steps that are taken by the Intel 80386 in translating a logical address into a physical address.
(b) What are the advantages to the OS of hardware that provides such complicated memory translation?
(c) Are there any disadvantages to this address translation system?


Chapter 9: Review Questions 9.3, 9.11, 9.18

511 students only: 9.5, 22.8

9.3. A certain computer provides its users with a virtual memory space of 2**32 bytes. The computer has 2**18 bytes of physical memory. The virtual memory is implemented by paging, and the page size is 4K bytes. A user process generated the virtual address 11123456. Explain how the system establishes the corresponding physical location. Distinguish between software and hardware operations.

9.11. Consider the following page reference string:
	1, 2, 3, 4, 2, 1, 5, 6, 2, 1, 2, 3, 7, 6, 3, 2, 1, 2, 3, 6
How many page faults would occur for the following replacement algorithms, assuming one, two, three, four, five, size, or seven frames? Remember that all frames are initially empty, so your first unique pages will all cost one fault each.
LRU replacement
FIFO replacement
Optimal replacement
# Frames LRU FIFO Optimal
1 20 20 20
2 18 18 15
3 15 16 11
4 10 14 8
5 8 10 7
6 7 10 7
7 7 7 7

9.17 (not in the assignement, but I'll leave the solution here).
Consider a demand-paging system with a paging disk that has an average access and transfer time of 20 ms. Addresses are translated through a page table in main memory, with an access time of 1 us per memory access. Thus, each memory reference through the page table takes two accesses. To improve this time, we have added an associative memory that reduces access time to one memory reference, if the page-table entry is in the associative memory.

Assume that 80% of the accesses are in the associative memory, and that, of the remaining, 10% (or 2% of the total) cause page faults. What is the effective memory access time?

	e.a. = 1 us + (0.20 * 1 us) + (0.02 * 20,000 us)
	     = 401.2 us
Or, if you prefer
	e.a. = (0.80 * 1 us) + (0.18 * 2 us) + (0.02 * 20,002 us)
	     = .8 us + .36 us + 400.04 us
	     = 401.2 us

9.18. Consider a demand-paged computer system where the degree
of multi-programming is currently fixed at four. The system
was recently measureed to determine utilization of CPU and the
paging disk. The results are one of the following alternatives.

For each case, what is happening? Can the degree of
multiprogramming be increased to increase the CPU utilization?
Is the paging helping?

a. CPU utilization 13 percent; disk utilization 97 percent

System is thrashing. The degree of multiprogramming should be
decreased. Paging is not helping.

b. CPU utilization 87 percent; disk utilization 3 percent

System is well utilized, CPU is being kept busy most of the time.
The degree of multiprogramming probably should stay the same,
increasing it may lead to thrashing. Paging is helping.

c. CPU utilization 13 percent; disk utilization 3 percent

System is under utilized, the CPU is not getting enough work.
The degree of multiprogramming should be increased. Paging is
not really helping or hurting.

9.5. Suppose we have a demand-paged memory. The page table is held in registers. It takes 8 ms to service a page fault if an empty page is available or the replaced page is not modified, and 20 m if the replaced page is modified. Memory access time is 100 ns.

Assume that the page to be replaced is modified 70% of the time. What is the maximum acceptable page-fault rate for an effective access time of no more than 200 ns?

	[note:  everything shown in microseconds]
	0.2 us = ((1-P) * 0.1 us) + (0.3P * 8,000 us) + (0.7P * 20,000 us)
	   0.1 = -01.P + 2,400P + 14,000P
           0.1 ~ 16,400 P
 	     P ~ 0.000006 
22.8. What are three advantages of dynamic (shared) linkage of libraries, compared to static linkage? What are two cases where static linkage is preferable?