CS411/511. Operating Systems

Maillist Archive, Spring 1999

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Re: About the project.


> 	1) I'm doing most of the sheduling job in insert_ready function by
> putting in the head of the ready queue the process with the shortest
> calculated remaining time in such a way that the dispatch function remains
> the same as in RR, dispatching the job at the head of the queue. It seems
> the easiest way to do it but is this right (not touching the dispatch
> function)?

You can solve the problem changing just insert_ready or just dispatch, you
don't necessarily have to change both.

> 	2) In the book it's mentioned that a process can be preempted if a
> new process comes to the ready queue with a lower SRT than the process
> that is actually in execution. I don't know how can we do this? If OSP is
> executing the code in the ready queue that means that a process is not in
> execution anymore.

You don't need to worry about this.  We will just wait for insert_ready to
be called due to a system interrupt.

> 	3) Can we use the initial value of tao as zero in the equation? 

Yes, this will give new processes an average of 0 so they will get first
shot at the CPU, sounds like a reasonable policy.

> 	4) The most important parameters for this project are av. waiting
> time and av. turnaround time, so a way to test if the algorithm works fine
> is to compare results with RR. We should observe lower values on those
> parameters (and probably in cpu utilization too) rigth? . After 5
> simulations what is the approximate % of improvement we should see (using
> heavy.parms) on the average?.

You may or may not see any difference.  To see if your queue is being
ordered correctly, I suggest you create a function that prints out all the
pcb's in the ready_q along with their exponential average.  If the queue
is always in order, you are good to go.

________________________________________________________________________
Keith D. Vertanen                         "To know is nothing at all; 
Oregon State University	                   to imagine is everything."
vertanen@cs.orst.edu	                      -Anatole Thibault
www.cs.orst.edu/~vertanen                   




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