library ieee;
use ieee.std_logic_1164.all;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity LaserTimer is
	port (b: in std_logic;
	x: out std_logic;
	clk: in std_logic;
	rst: in std_logic);
end LaserTimer;

architecture behavior of LaserTimer is

	type statetype is
	(S_Off, S_On1, S_On2, S_On3);
	signal currentstate, nextstate: statetype;
	
	begin
	
		statereg: process(clk)
		begin
			if (clk='1' and clk'event) then
				if (rst='1') then -- intial state
					currentstate <= S_Off;
				else
					currentstate <= nextstate;
				end if;
			end if;
		end process;
		
	comblogic: process (currentstate, b)
		begin
		nextstate <= currentstate;
			case currentstate is
				when S_Off =>
					x <= '0'; -- laser off
					if (b='0') then
						nextstate <= S_Off;
					else
						nextstate <= S_On1;
					end if;
				when S_On1 =>
					x <= '1'; -- laser on
					nextstate <= S_On2;
				when S_On2 =>
					x <= '1'; -- laser still on
					nextstate <= S_On3;
				when S_On3 =>
					x <= '1'; -- laser still on
					nextstate <= S_Off;
			end case;
	end process;
end behavior;