📑 Publications

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R. Javadi, X. Lin and T. Anand, ”A 3.2pJ/b 0.068pJ/b/dB 25Gb/s NRZ wireline transceiver with 3-tap FFE and random forest classification for compensating 47dB loss in 16nm FinFET,” in Proc. Symp. on VLSI Tech. and Circuits, 2025.
R. Javadi and T. Anand, ”A 0.055pJ/bit/dB 42Gb/s PAM-4 wireline transceiver with consecutive symbol to center (CSC) encoding and classification for 26dB loss in 16nm FinFET,” in Proc. IEEE Custom Integ. Circuits Conf. (CICC), 2025.
R. Javadi and T. Anand, ”An enhanced eye-opening PAM-4 with encoding for short-reach wireline communication systems,” in Proc. IEEE Int. Midwest Symp. on Circuits and Systems (MWSCAS), 2024.
A. Ensinger, R. Javadi, X. Lin, B. Bose and T. Anand, ”Minimum power point design of inverter based continuous time linear equalizer (CTLE),” in Proc. IEEE Int. Symp. on Circuits and Systems (ISCAS), 2024.