IEEE Transactions on COMPUTER-AIDED DESIGN of Integrated Circuits and Systems

January 2006

• Wenjian Yu, Mengsheng Zhang and Zeyi Wang, Efficient 3-D Extraction of Interconnect Capacitance Considering Floating Metal-Fills with Boundary Element Method. (2084)
• Quming Zhou and Kartik Mohanram, Gate Sizing to Radiation Harden Combinational Logic. (2198)
• Jaewon Seo, Taewhan Kim, Ki-Seok Chung, Joonwon Lee, Optimal Intra-Task Dynamic Voltage Scaling and Its Practical Extensions. (1807)
• Arijit Raychowdhury and Kaushik Roy, Modeling of Metallic Carbon Nanotube Interconnects for Circuit Simulations and a Comparison with Cu Interconnects for Scaled Technologies. (2009)
• Kanad Chakraborty, Alexey Lvov, Maharaj Mukherjee, Novel Algorithms for Placement of Rectangular Covers for Mask Inspection in Advanced Lithography. (2180)
• Ying Zhang and Krishnendu Chakrabarty, A Unified Approach for Fault Tolerance and Dynamic Power Management in Fixed-Priority, Real Time Embedded Systems. (2047)
• Goerschwin Fey, Rolf Drechsler, Minimizing the Number of Paths in BDDs - Theory and Algorithm. (2134)
• Imad A. Ferzli and Farid N. Najm, Analysis and Verification of Power Grids Considering Process-Induced Leakage Current Variations. (2115)
• Maria C. Molina, Rafael Ruiz-Sautua, Jose M. Mendias, Roman Hermida, Bitwise Scheduling to Balance the Computational Cost of Behavioural Specifications. (2021)
• Josh Yang, Baosheng Wang, Yuejian Wu and Andre Ivanov, Fast Detection of Data Retention Faults and Other SRAM Cell Open Defects. (2058)
• Kyosun Kim, Ramesh Karri, Miodrag Potkonjak, Micro-Preemption Synthesis: An Enabling Mechanism for Multi-Task VLSI Systems. (2112)
• Min Zhao, Yuhong Fu, Vladimir Zolotov, Savithri Sundareswaran, and Rajendran Panda, Optimal Placement of Power Supply Pads and Pins. (2002)
• Qiang Xu and Nicola Nicolici, Multi-Frequency TAM Design for Hierarchical SOCs. (2097)
• Li Shang, Li-Shiuan Peh, Niraj K. Jha, PowerHerd: A distributed scheme for dynamically satisfying peak power constraints in interconnection networks. (1661)
• Jaijeet Roychowdhury and Robert Melville, Delivering Global DC Convergence for Large Mixed-Signal Circuits via Homotopy/Continuation Methods. (1509)

Short Papers:
• Shih-yu Yang and Christos A. Papachristou, A Method For Detecting Interconnect DSM Defects in Systems on Chip (SOCs). (2253)

February 2006 -- Special Issue on Biochips

• Fei Su, Krishnendu Chakrabarty and Richard B. Fair, Microfluidics-Based Biochips: Technology Issues, Implementation Platforms, and Design Automation Challenges. (2397)
• Jun Zeng, Modeling and Simulation of Electrified Droplets and Its Application to Computer-Aided Design of Digital Microfluidics. (2404)
• Jan Lienemann, Andreas Greiner, and Jan G. Korvink, Modeling, Simulation and Optimization of Electrowetting. (2355)
• Xin Wang, Jacob White, Joe Kanapka, Wenjing Ye, Narayan Aluru, Algorithms in FastStokes and its application to micromachined device simulation. (2463)
• Yi Wang, Qiao Lin, Tamal Mukherje, Composable Behavioral Models and Schematic-Based Simulation of Electrokinetic Lab-on-a-Chips. (2457)
• Michael D. Altman and Jaydeep P. Bardhan, Bruce Tidor, Jacob K. White, FFTSVD: A Fast Multiscale Boundary Element Method Solver Suitable for BioMEMS and Biomolecule Simulation. (2458)
• Dmitry Vasilyev, Michal Rewienski, Jacob White, Macromodel generation for BioMEMS components using a stabilized Balanced Truncation plus Trajectory. (2512)
• A. S. Bedekar, Y. Wang, S. Krishnamoorthy, S. S. Siddhaye, and S. Sundaram, System-level simulation of flow induced dispersion in lab-on-a-chip systems. (2653)
• A.B. Kahng, I.I. Mandoiu, S. Reda, X. Xu, and A.Z. Zelikovsky, Computer-Aided Optimization of DNA Array Design and Manufacturing. (2475)
• Anton J. Pfeiffer, Tamal Mukherjee, and Steinar Hauan, Synthesis of Multiplexed Biofluidic Microchips. (2447)
• Karl F. Bohringer, Modeling and Controlling Parallel Tasks in Droplet-Based Microfluidic Systems. (2440)
• Eric J. Griffith, Srinivas Akella, Mark Goldberg, Performance Characterization of a Reconfigurable Planar Array Digital Microfluidic System. (2590)
• Sungroh Yoon, Luca Benini, Giovanni De Micheli, A Pattern Mining Method for High-throughput Lab-on-a-chip Data Analysis. (2441)

Short Papers:
• R. Magargle, J.F. Hoburg, T. Mukherjee, Microfluidic Injector Models Based On Artificial Neural Networks. (2464)

March 2006

• Sangyun Kim, Peter A. Beerel, Pipeline Optimization for Asynchronous Circuits: Complexity Analysis and an Efficient Optimal Algorithm. (1736)
• Muhammet Mustafa Ozdal and Martin D. F. Wong, An Algorithmic Study of Single-Layer Bus Routing for High-Speed Boards. (1916)
• Joonhwan Yi and John P. Hayes, High-level delay test generation for modular circuits. (2165)
• Kaijie Wu, Ramesh Karri, Algorithm Level RE-computing with Shifted Operands - A Register Transfer Level Concurrent Error Detection. (1851)
• Jason H. Anderson, Farid N. Najm, Active Leakage Power Optimization for FPGAs. (2064)
• Akshay Sharma, Carl Ebeling, Scott Hauck, PipeRoute: A Pipelining-Aware Router for Reconfigurable Architectures. (2181)
• Loganathan Lingappan, Srivaths Ravi, and Niraj K. Jha, Satisfiability based Test Generation for Non-separable RTL Controller-datapath Circuits. (2259)
• Dongkun Shin and Jihong Kim, Dynamic Voltage Scaling of Mixed Task Sets in Priority-Driven Systems. (2096)
• Navaratnasothie Selvakkumaran and George Karypis, Multi-Objective Hypergraph Partitioning Algorithms for Cut and Maximum Subdomain Degree Minimization. (1850)
• Ruibing Lu and Cheng-Kok Koh, Performance Analysis of Latency Insensitive Systems. (2091)
• Hongmei Li,Cole E. Zemke, Giorgos Manetas, Vladimir I. Okhmatovski, Elyse Rosenbaum and Andreas C. Cangellaris, An automated and efficient substrate noise analysis tool. (2136)
• Zhuo Li and Weiping Shi, An $O(bn^2)$ Time Algorithm for Optimal Buffer Insertion with b Buffer Types. (2183)
• Zhiyuan Wang; Malgorzata Marek-Sadowska; Kun-Han Tsai; Janusz Rajski, Analysis and Methodology for the Multiple Fault Diagnosis. (2263)
• Andrew Kahng and Sherief Reda, New and Improved BIST Diagnosis Methods from Combinatorial Group Testing Theory. (2153)
• Hao Zheng, Chris J. Myers, David Walter, Scott Little, Tomohiro Yoneda, Verification of Timed Circuits with Failure Directed Abstractions. (2186)

Short Papers:
• Hua Tang, Alex Doboli, High-level Synthesis of Delta-Sigma Modulator Topologies Optimized for Complexity, Sensitivity and Performance. (2211)
• Irith Pomeranz and Sudhakar M. Reddy, Scan-BIST Based on Transition Probabilities for Circuits with Single and Multiple Scan Chains. (2122)

April 2006 -- Special Issue on International Symposium on Physical Design 2005

• Qinghua Liu, Malgorzata Marek-Sadowska, Semi-individual Wire-Length Prediction with Application to Logic Synthesis. (2683)
• Rupesh S. Shelar, Prashant Saxena, and Sachin S. Sapatnekar, Technology Mapping Targeting Routing Congestion Under Delay Constraints. (2694)
• Tung-Chieh Chen and Yao-Wen Chang, Modern Floorplanning Based on B*-tree and Fast Simulated Annealing. (2713)
• Baris Taskin and Ivan S. Kourtev, Delay Insertion Method in Clock Skew Scheduling. (2685)
• Jaskirat Singh; Sachin Sapatnekar, A Partition-based Algorithm for Power Grid Design using Locality. (2704)
• Charles Alpert, Andrew Kahng, Gi-Joon Nam, Sherief Reda and Paul Villarrubia, A Fast Hierarchical Quadratic Placement Algorithm. (2703)
• Brent Goplen, Sachin S. Sapatnekar, lacement of Thermal Vias in 3D ICs using Various Thermal Objectives. (2721)
• James D. Ma and Rob A. Rutenbar, Fast Interval-Valued Statistical Modeling of Interconnect and Effective Capacitance. (2709)
• Yukiko Kubo and Atsushi Takahashi, Global Routing by Iterative Improvements for 2-Layer Ball Grid Array Packages. (2690)

Short Papers:
• Di Wu, Jiang Hu and Rabi Mahapatra, Antenna Avoidance in Layer Assignment. (2687)