MOSIS NDA

 This is an important step to obtain access to tsmc 0.18um pdk for the class

To access tsmc 0.18um pdk, mosis requires all the users to sign a Non-Disclosure Agreement (NDA). Please print a copy of the MOSIS NDA form, sign and submit to Prof. Moon to be added to the pdk user list.

EXAMPLE:
DESIGN AND SIMULATION OF AN INVERTING AMPLIFIER

This example will help you familiarize with Cadence OA. You will design a simple inverting amplifier, and then observe its operating point and frequency response behavior. This will show the most important commands and steps to use when working with schematics in Cadence.

Before starting with the design example, there are some details that are worth mentioning:

The following picture shows the inverting amplifier circuit, ready for netlisting. The next section explains how to draw it in Cadence.

Simple inverting amplifier
Figure 1: Design example.
You may see license warnings about Virtuoso_Schematic_Editor_L or Analog_Design_Environment_L in the CIW window. You may ignore this. That just means the basic license for Schematics L or ADE L is unavailable, and another version called Virtuoso_Schematic_Editor_XL or Analog_Design_Environment_GXL will be used.

1. Create a library for your new design:

 >From the library manager window:
In the dialog box "Technology File for New Library", choose " Attach to an existing technology library".
Then from the dropdown menu choose "tsmc18". Click OK
techlib1
techlib2
Figure 2: Attaching Technology Library.

2. Create a new cell, where you will design the inverter:

 In Library Manager:
newcell
Figure 3: New Cellview.
A schematic window will open.

3. Design your circuit:

3.1 Placing components:

 For this inverter, you will need an nmos transistor, a resistor and a capacitor.
>From Schematic window:
instance_mosfet
Figure 4: New Instance: Mosfet.
instance_res
Figure 5: New Instance: Resistor.
instance_cap
Figure 4: New Instance: Capacitor.
If you make any mistake, you can always use:

You need to change the properties of some components:
properties_mosfet properties_res properties_cap
Figure 5: Instance Properties.

3.2 Connect components:

 Connect the component terminals as shown in figure 1, using:

4. Adding Pins:

 By adding pins, you can identify the I/O ports of the schematic. At a later stage, you can also use pins as connection points for hierarchical designs. To learn more about this, see the section about creating symbols.

5. Simulate With Spectre:

This section explains how to simulate in Cadence using Spectre. Create a new cellview called "testbench_inverter" and instantiate the symbol inverter into the testbech. Add supply and input voltage sources.

testbench
Figure 6: Testbench.
To run the simualtion, launch the Analog Design Environment (ADE) window from: Then, in ADE Window:
To change the process corners from typical(tt) to slow(ss) and fast(ff) corners:
corners
Figure 7: Changing Process Corners .
To setup dc and ac simulations:
dc_setup ac_setup
Figure 8: DC and AC Simulation Setup .
To run simulation:
To run parametric simulations:
parametric_setup
Figure 9: Parametric Simulation Setup .
To save the states in ADE L and rerun some other time:
save_state
Figure 10: Saving the simulation setup as a cellview .

6. Simulate With Hspice:

If you know how to use these tools or would like to play with them, please feel free to try. If the integrated simulation environment works for you, then great - you will not need to do the steps in this section or the following one (View Results). However, as a backup, you should try be comfortable with exporting the netlist manually, simulating with hspice from the command line, and viewing the results in an external viewer. This procedure is explained in this section and the next...

It's possible to generate a complete netlist from the schematic and to simulate it outside the Cadence tools environment.

Invoke the Analog Environment simulation window from: Launch->ADE L
Then, in ADE Window:

Generate netlist: You can now simulate this netlist file with HSPICE. But before you do, it's necessary to add some more things. With your favorite editor, open the file and add the following components: 
Vdd vdd! 0 DC 5V

Vin vin 0 DC 0.75 AC 1
Also, Ddefine a dc operating point and an ac analysis with the following: 
.AC DEC 10 1e3 1e9
To simulate for different process corners edit the line that includes the "hspice.mdl" file.
For typical corner (tt): 
.INCLUDE "/nfs/stak/users/moon/ece423/pdk/tsmc018/models/hspice/hspice.mdl"
For slow corner (ss): 
.INCLUDE "/nfs/stak/users/moon/ece423/pdk/tsmc018/models/hspice/hspice_ss.mdl"
For fast corner (ff): 
.INCLUDE "/nfs/stak/users/moon/ece423/pdk/tsmc018/models/hspice/hspice_ff.mdl"
Finally, you need to remove the following line:
.OPTION INGOLD=2 ARTIST=2 PSF=2 PROBE=0
... and to replace it with: 
.OPTION POST
Now you can start the simulation: 
hspice inverter.sp >! inverter.lis
If everything goes well, you will get the message 'hspice job concluded'. Otherwise, if something goes wrong, you will get 'hspice job aborted'.

6. View Results:

For Spectre simulations, you can view results by using the Results menu in the ADE. Explore the Direct Plot, Print, and Annotate sub-menus. To see DC node voltages, operating conditions, etc, use the options in Restuls->Print or Results->Annotate. For waveforms, look in Results->Direct Plot.)

For Hspice simulations, You can see the DC operating point by opening the file inverter.lis with a text editor, and searching for the keyword 'mosfets'. The node voltages can be found if you search for the keyword 'operating'.
To see the frequency response, you will have to use a graphic postprocessor, such as CosmosScope:

This completes the simulation, and the design example.
Most things in Cadence tool are intuitive, so I hope this tutorial gave you a good feeling for its environment. Feel free to explore the menus and capabilities of the tools you just used.