This example will help you to create a layout for the inverter you designed in the first example. It will go over the Virtuoso layout tool and how to layout mosfets, resistors, and capacitors in our process. There are many considerations to take into account when deciding how to do a layout. This is NOT an example on layout techniques, but more of a generalized example to help get you farmiliar with Virtuoso and laying-out some basic components.

The following picture shows a layout for the inverting amplifier, ready for extracting. The next section explains how to make each of the separate components in Virtuoso.

Figure 1: Layout example.

File->New->Cell View:
Choose the desired library and cell name, and type `layout' for the View Type .

Figure 2: New Layout Cellview.

Figure 3: Palette Window.

Make sure that the grid size for the layout is set to 0.005um. This is a really important step. Violating the minimum grid size can result in off-grid errors in the later stages.
To set the grid size, choose Options->Display
Set X snap spacing and Y snap spacing to 0.005

Figure 4: Setting the grid size .

For this inverter we will need to layout an nmos transistor, a resistor, and a capacitor. The following sections will describe how to access the layout of these components from the pdk and how to access the terminals for routing. SOme of these steps are very similar to the schematic example.

Create->Instance
In the Add Instance window Click Browse to open Component Browser.
Make sure the Library in the Component Browser is set to tsmc18 and enable Show Categories to sort the components in the pdk library.
In the Component Browser window,
For mosfet, choose
Category: Mosfet_4T
Cell: nmos2v
View: layout
then place it.

When making MOSFETs you can create a single transistor, or use fingers or multipliers to create multiple transistors at once. Fingers makes transistors which are connected in series, multipliers create transistors which are connected in parallel. For our layout example we will be using fingers to make multiple transistors which will be equivalent to one really wide transistor. However, if transistors have to be matched, multipliers are preferred.

To edit the device parameters choose,
Edit->Basic->Properties
Select the transistor, then under the "parameters" tab, change the following parameters:

Length (l): 1.2u
total_width: 60u
Fingers: 5







Figure 5: NMOS parameters.

NOTE: For this design kit you can only set transistor lengths and widths in multiples of grid units(.005uM). Keep this in mind when making your circuits.
You can now place the nmos layout wherever you would like.

Clicking SHIFT-F will show all levels and allow you to see inside the cell you just placed (CNTRL-F will change back to just showing the top level).

Now we need to connect together the drains, gates, and sources and place some bulk connections.

In the Palette window change the current layer to poly (drawing).
Create->Path
Now draw a poly path connecting one gate to another accross the top of the transistor block. Make the path extend up alittle ways from the top of the transistor block before going over and down. Repeat this until all gates are connected together. Connect the gate poly layer to metal1 layer using a via as the pdk does not allow any pins on poly layer.

Repeat this process using metal1 to connect every other drain/source connection together across the top.
Do the same thing for the opposite every other drain/source along the bottom. Your finished transistor should look similar to the following:




Figure 6: NMOS example.

Lastly we need to create some bulk connections. We will create these across the left side of the transistor block.

Create->Instance


For NMOS bulk, choose
Cell: M1_PACTIVE
View: layout
rows: 25
columns: 2


When placing instances you can place multiple instances in a matrix type formation by specifying the number of rows and columns to place. We will now use this to place a column of ptaps along the side of the transistor block.

We now have a transistor with single gate, drain, source, and bulk connections. Make sure to do DRC before continuing on to make sure everything was placed correctly.


2.2 Layout of Resistors:

Place resistor (rnhpoly) and capacitors (mimcap_2p0_sin) from library tsmc18.
For resistor, choose,
Category: Resistor_2T
Cell: rnhpoly
View: layout


Select the resistor. Edit the segment width and segment length parameters to set a resistance of 4k Ohms.
The resistance value is given by R = sheet_resistance*(segment_length/segment_width). For rnhpoly, the sheet resistance is 295.3 ohms/square.




Figure 7: Resistor Parameters.

The end terminals are accesibile with Metal1. The completed resistor layout should look like the figure below.


We now have a resistor with metal1 connections on each side. Once again, make sure to do DRC before continuing on.



Figure 8: Resistor example.

2.3 Layout of Capacitors:

The type of capacitor we will using is a mimcap. It is made up of two closely spaced layers of metal. For our setup, we will have a capacitance density of roughly 2fF per 1uM^2. For this reason most capacitors will be very large in comparison to some of your other components.
For capacitor, choose,
Category: Capacitor_BB
Cell: mimcap_2p0_sin
View: layout


Select the capacitor. Edit the Width and Length properties to set a capacitance of 1pF.
The capacitance value is given by C = Capacitance_per_unit_area*(length*width). For mimcap_2p0_sin, the capacitance per unit area is 2fF/um².




Figure 9: Mimcap Parameters.

The top plate terminal is accessible with Metal6 and the bottom terminal is accessible with Metal5. The completed mimcap layout should look like the figure shown below.

Now you have a capacitor with two terminals . Remember, make sure to do DRC again to be sure you aren't violating any rules.




Figure 10: Mim Capacitor example.

If you make any mistake, you can always use:

Edit->Delete or
Edit->Rotate or
Edit->Move or
Edit->Stretch
Try using F3 key during copy, move, strech or any layout operation for additional controls.


If you are using Layout_XL, there is an option to export layout components from schematic so that the properties need not be edited. Explore these options to find faster ways to create layouts.

3. Routing and Adding Pins:

Now that we have all the components we need to make our inverter, we can simply move them around and route the correct connections. As mentioned earlier, this example is less focused on the techniques used for layout, and more on how to make some general components and get the reader familiar with using the tool. However, a couple quick pointers will be given here.


• When putting together your layout, place large metal rectangles along the top and botttom for your Vdd and Gnd rails. Try to place all of your layout within these rails. Also, when connecting to these (or any routing connection really) its always a good idea to put as many via connections as possible.
  
  
• Although it's not really obvious from this example, it is also good practice to try and make your layout as symetrical as possible.
  
  
• When routing large layouts it's a good idea to try and keep track of what you are routing with. Route with poly as little as possible since it's resistance is higher than metal. It also helps to set some general directions for different layers. For instance, for all horizontal traces use metal2, for all vertical traces use metal1. This will help keep your layout neat and organized.
  
  

After routing all your connections for the inverter (don't forget to DRC often), you simply need to add pins for VIN, VOUT, VDD and GND.

Create->Label


Label: VIN (or the pin name you want to enter)
Label layer/ Purpose: Select layer dropdown menu-> Metal3 pin (choose the pin layer corresponding to the metal on which you intend place the label)
Font: Roman (better clarity)


After doing this for all the nodes your layout is complete!



Figure 10: Adding Pins/Labels.

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