--lpm_divide DEVICE_FAMILY="Cyclone IV E" LPM_DREPRESENTATION="UNSIGNED" LPM_NREPRESENTATION="UNSIGNED" LPM_WIDTHD=11 LPM_WIDTHN=22 OPTIMIZE_FOR_SPEED=5 denom numer quotient CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48 IGNORE_CARRY_BUFFERS="OFF" --VERSION_BEGIN 15.1 cbx_cycloneii 2015:11:24:18:49:55:SJ cbx_lpm_abs 2015:11:24:18:49:55:SJ cbx_lpm_add_sub 2015:11:24:18:49:55:SJ cbx_lpm_divide 2015:11:24:18:49:55:SJ cbx_mgl 2015:11:24:20:43:33:SJ cbx_nadder 2015:11:24:18:49:55:SJ cbx_stratix 2015:11:24:18:49:55:SJ cbx_stratixii 2015:11:24:18:49:55:SJ cbx_util_mgl 2015:11:24:18:49:55:SJ VERSION_END -- Copyright (C) 1991-2015 Altera Corporation. All rights reserved. -- Your use of Altera Corporation's design tools, logic functions -- and other software and tools, and its AMPP partner logic -- functions, and any output files from any of the foregoing -- (including device programming or simulation files), and any -- associated documentation or information are expressly subject -- to the terms and conditions of the Altera Program License -- Subscription Agreement, the Altera Quartus Prime License Agreement, -- the Altera MegaCore Function License Agreement, or other -- applicable license agreement, including, without limitation, -- that your use is for the sole purpose of programming logic -- devices manufactured by Altera and sold by Altera or its -- authorized distributors. Please refer to the applicable -- agreement for further details. FUNCTION sign_div_unsign_5nh (denominator[10..0], numerator[21..0]) RETURNS ( quotient[21..0], remainder[10..0]); --synthesis_resources = lut 215 SUBDESIGN lpm_divide_dkm ( denom[10..0] : input; numer[21..0] : input; quotient[21..0] : output; remain[10..0] : output; ) VARIABLE divider : sign_div_unsign_5nh; numer_tmp[21..0] : WIRE; BEGIN divider.denominator[] = denom[]; divider.numerator[] = numer_tmp[]; numer_tmp[] = numer[]; quotient[] = divider.quotient[]; remain[] = divider.remainder[]; END; --VALID FILE