#include <stdio.h>
#include <math.h>
#include <stdlib.h>

// compile with "cc  sine_gen.c -lm
// create file with a.out >! sine_rom.sv

void main()
{
    int w = 11;  //address width of rom
    int d = 8;   //data width of rom
    int i;
    int sine;    //output values to be generated

//create the verilog file by redirection
printf("module sine_rom( input logic clk,\n");
printf("  input  logic unsigned [10:0] addr,\n");
printf("  output logic unsigned [7:0]  sine_val );\n");
printf("  \n");

printf("  always_ff @(posedge clk)\n");
printf("    case (addr)\n");
for (i=0 ; i<= 2047 ; i++){
  sine = 127 + lroundf((126 * sin(2*M_PI*i/2048) +0.5));
//  printf("i=%d , sine = %d \n", i, sine);
  printf("      %d : sine_val <= %d;\n", i, sine );
}

printf("endcase \n");
printf("  \n");
printf("endmodule \n");

}