#!/bin/bash

main() {
	cnt=0
	maxcnt=9
	hyphens="----------------------------------------"
	OSU_syn_lib="/nfs/guille/a1/cadlibs/osu_lib"

	# get cmdline options
	gen_arg=""
	rtl_file="rtl_src/alu.vhd"
	getoptions $@

	# remove temporary files
	echo $hyphens
	echo "[$cnt/$maxcnt] removing temporary files"
	./clean || fail
	let ++cnt

	# generate input/output vector set
	echo $hyphens
	echo "[$cnt/$maxcnt] generating input/output vector set"
	gen
	let ++cnt

	# compile the rtl source
	echo $hyphens
	echo "[$cnt/$maxcnt] compiling the rtl source"
	compile
	let ++cnt

	# simulate the alu
	echo $hyphens
	echo "[$cnt/$maxcnt] simulating the rtl alu"
	sim
	let ++cnt

	# compare alu.list to alu.list.golden
	echo $hyphens
	echo "[$cnt/$maxcnt] comparing rtl alu.list to alu.list.golden"
	cmp_results reports/rtl_miscompares
	let ++cnt

	mv vectors/alu.list vectors/alu.list.rtl || fail

	# synthesise the alu
	echo $hyphens
	echo "[$cnt/$maxcnt] synthesizing alu"
	synthesize
	let ++cnt

	# do verilog compilation on the cell library
	echo $hyphens
	echo "[$cnt/$maxcnt] verilog compilation of the cell library"
	vcompile
	let ++cnt

	# compile the gate source
	echo $hyphens
	echo "[$cnt/$maxcnt] compiling the gate source"
	gcompile
	let ++cnt

	# simulate the alu
	echo $hyphens
	echo "[$cnt/$maxcnt] simulating the gate alu"
	gsim
	let ++cnt

	# compare alu.list to alu.list.golden
	echo $hyphens
	echo "[$cnt/$maxcnt] comparing gate alu.list to alu.list.golden"
	cmp_results reports/gate_miscompares

	mv vectors/alu.list vectors/alu.gate.rtl || fail

	echo PASSED
}

gen() {
	_mkdir vectors
	echo "./bin/gen.pl $gen_arg > vectors/alu.list.golden 2> bin/alu.do"
	./bin/gen.pl $gen_arg > vectors/alu.list.golden 2> bin/alu.do || fail
}

compile() {
	_exists rtl_src/alu_pkg.vhd $rtl_file
	echo "vcom rtl_src/alu_pkg.vhd"
	vcom rtl_src/alu_pkg.vhd || fail
	echo "vcom $rtl_file"
	vcom $rtl_file || fail
}

vcompile() {
	_exists $OSU_syn_lib/lib_ss_1.62_125c.v 
	echo "vlog $OSU_syn_lib/lib_ss_1.62_125c.v -work work"
	vlog $OSU_syn_lib/lib_ss_1.62_125c.v -work work || fail
}

gcompile() {
	_exists vlogout/alu.gate.v
	echo "vlog vlogout/alu.gate.v -work work"
	vlog vlogout/alu.gate.v -work work || fail
}

sim() {
	_mkdir vectors
	echo "vsim alu -do bin/alu.do -quiet -c -t 1ps"
	vsim alu -do bin/alu.do -quiet -c -t 1ps |grep -vE '^# //'  || fail
}

gsim() {
	_mkdir vectors
	_exists sdfout/alu.gate.sdf
	echo "vsim alu -sdfmax sdfout/alu.gate.sdf -do bin/alu.do -quiet -c -t 1ps +nowarnTFMPC"
	vsim alu -sdfmax sdfout/alu.gate.sdf -do bin/alu.do -quiet -c -t 1ps \
			+nowarnTFMPC|grep -vE '^# //' || fail
}

synthesize() {
	_mkdir vlogout sdfout
	_exists bin/dc_syn
	echo "dc_shell-xg-t < bin/dc_syn"
	dc_shell-xg-t < bin/dc_syn || fail
}

# compare output of the multiplier against the golden vectors
cmp_results() {
	_mkdir reports
	local miscompare_file=$1
	local gold_file=vectors/alu.list.golden
	local result_file=vectors/alu.list
	_exists $gold_file $result_file

	# compare the number of lines in the sim and gold vector files
	local gold_lines=`num_lines $gold_file`
	local result_lines=`num_lines $result_file`

	# results contain three or four header lines
	local header_lines=`num_hlines $result_file`
	result_lines=$(($result_lines-$header_lines))

	if (( $gold_lines != $result_lines )); then
		echo "	found $result_lines results, expected $gold_lines" >&2
		fail
	fi

	# compare the contents of the sim and gold vector files
	echo "./bin/cmp_results.pl $gold_file $result_file > $miscompare_file"
	if ! ./bin/cmp_results.pl $gold_file $result_file > $miscompare_file; then
		echo "	see $miscompare_file for more info" >&2
		fail
	fi
}

# get cmdline options
getoptions() {
	while getopts "rgRVsSCGcp:bBh" opt; do
		case "$opt" in
		"r") ./clean || fail; exit ;;
		"g") gen; exit ;;
		"R") compile; exit ;;
		"V") vcompile; exit ;;
		"s") sim; exit ;;
		"S") synthesize; exit ;;
		"C") gcompile; exit ;;
		"G") gsim; exit ;;
		"c") cmp_results reports/miscompares; exit ;;
		"p") gen_arg="$genarg --strobe-period=$OPTARG" ;;
		"b") gen_arg="$genarg --break" ;;
		"B") rtl_file="rtl_src/alu-broken.vhd" ;;
		"h") print_usage && exit 0 ;;
		*) echo "try \"$0 -h\" for usage" >&2 && exit 1 ;;
		esac
	done
}


# create directories if they doesn't exist
_mkdir() {
	for dir in $@; do
		[ -d $dir ] || mkdir -p $dir || fail
	done
}

# verify that files/dirs exists
_exists() {
	for file in $@; do
		[ ! -e $file ] && echo "$file does not exist" >&2 && fail
	done
}

# print the number of lines in a file
num_lines() {
	wc -l $1 |awk '{print $1}'
}

# print the number of header lines in a list file
num_hlines() {
	local file=$1
	local cnt=1
	while ! head -n$cnt $file |grep 0 > /dev/null; do
		let ++cnt
	done
	echo $(($cnt-1))
}

# print FAILED and exit
fail() {
	echo FAILED
	exit 1
}

print_usage() {
	echo "Usage: $0 [OPTION]..."
	echo "	Utility to test the operation of ALU"
	echo "OPTIONS"
	echo "-r	remove temp files"
	echo "-g	generate golden vector set"
	echo "-R	compile rtl alu"
	echo "-s	simulate the rtl alu"
	echo "-c	compare results to golden vector set"
	echo "-S	synthesize the alu"
	echo "-C	compile gate alu"
	echo "-G	simulate the gate alu"
	echo "-V	compile verilog"
	echo "-p TIME	set strobe period to TIME ns (default=20)"
	echo "-b	break the gold vector generator"
	echo "-B	break the alu"
	echo "-h	print this message"
}

main $@