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| Name | Last modified | Size | Description |
|---|---|---|---|---|
| Parent Directory | - | ||
| lab1_v.sdo | 2016-03-31 11:16 | 8.1K | |
| lab1_min_1200mv_0c_v_fast.sdo | 2016-03-31 11:16 | 8.0K | |
| lab1.sft | 2016-03-31 11:16 | 341 | |
| lab1_modelsim.xrf | 2016-03-31 11:16 | 1.5K | |
| lab1_min_1200mv_0c_fast.svo | 2016-03-31 11:16 | 13K | |
| lab1_6_1200mv_85c_v_slow.sdo | 2016-03-31 11:16 | 8.1K | |
| lab1_6_1200mv_85c_slow.svo | 2016-03-31 11:16 | 13K | |
| lab1_6_1200mv_0c_v_slow.sdo | 2016-03-31 11:16 | 8.1K | |
| lab1_6_1200mv_0c_slow.svo | 2016-03-31 11:16 | 13K | |
| lab1.svo | 2016-03-31 11:16 | 13K | |
| msim_transcript | 2016-03-17 19:36 | 1.6K | |
| rtl_work/ | 2016-03-17 19:33 | - | |
| modelsim.ini | 2016-03-17 19:32 | 11K | |
| lab1_run_msim_rtl_verilog.do | 2016-03-17 19:32 | 192 | |