The majority of Analog-to-Digital converters (ADC) are designed without taking into consideration the distribution of input signal. In this research, we investigate a novel ADC architecture that is optimized for a given input signal's statistics. The new robust data-optimized stochastic flash (RDSF) ADC achieves robustness and high accuracy by employing (a) a large number of 1-bit quantizers operating in parallel with an additive noise and (b) a novel probability density transform (PDT).

Publications

1. T. Nguyen, "Robust Data-Optimized Stochastic Analog-to-Digital Converter," IEEE Transactions on Signal Processing, Vol. 55, No. 6, June, 2007
2. G.C. Temes, K. Lee and T. Nguyen, "Multicell Delta-Sigma Data Converters,", Invited Plenary Lecture, IEEE Internat. Midwest Symp., Aug. 6-9, 2006, San Juan, Puerto Rico.